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Magic Do is a VHDL hierarchy builder that automates the process of generating ncsim/modelsim compilation macro. The same file list can also be reused for synthesis scripts and/or compilation macro for any other simulator.Powerful tool to automate creating VHDL testbenches. Supports complex patterns and repeats to describe tests. Modular. Flexible - any variable can be include not just signals. Plot preview. Simulator displays descriptions as tests run.ED is a smart language sensitive programmer's editor, with a breadth and depth of powerful editing capabilities you're unlikely to find elsewhere. ED goes beyond editing with its Source Database Engine, unmatched Visual File Compare, Compiler support